Since the very early days of FPGAs, the technology has provided watchers with an enjoyable ping-pong match between the two biggest vendors: Altera Corp. and Xilinx Inc. There are other contenders, but the main action was always in the center court. Any time Altera or Xilinx released a new device family featuring more logic, more memory, more hard-coded macros--the list goes on--its archrival was soon to follow.

For a long time, these "big boys" enjoyed a somewhat privileged position. Each had its low-end, low-cost device families, and each had its high-end, high-cost, high-performance families with embedded DSP macros, embedded processor cores and high-speed serial interfaces. The last thing either company wanted was for a maverick player to leap into the fray with low-cost devices boasting high-end features.

That brings us to Lattice Semiconductor Corp., which likes to refer to itself as "the third force in the FPGA market." Its introduction in 2006 of low-cost LatticeECP2 devices boasting a carefully balanced mix of logic, memory, multipliers and DSP macros had to have been a factor in Xilinx's move to boost the DSP capabilities in its own low-cost FPGAs. Similarly, Lattice's addition of high-speed serial interconnect capability to its low-cost families was almost certainly a contributing factor in Altera's recent announcement regarding its Arria GX low-cost, transceiver-based FPGAs.

Of course, the one thing that really made Lattice stand out was the monolithic flash/SRAM technology in its LatticeXP devices. Being SRAM-based, FPGAs from Altera and Xilinx require external memory to hold their configuration data. By comparison, LatticeXP FPGAs carry this data in their internal flash memory; on power-up, by means of a massively parallel process, this data is copied into corresponding SRAM configuration cells.

In addition to "instant on" and high security, Lattice's monolithic flash/ SRAM fabric makes it possible to load new configuration data from an external source into flash while the device continues to run, and to then copy this new configuration into the SRAM cells in a fraction of a second. Alternatively, using Lattice's FlashBAK technology, the current state of the SRAM configuration can be copied back into the flash memory.

The only downside was that these devices were offered in 130-nanometer technology. By comparison, Altera and Xilinx have long had a presence at the 90-nm and 65-nm nodes.

The latest round of the ping-pong match begins this week, when Lattice will announce the availability of the LatticeXP2 family, its third generation of nonvolatile FPGAs, produced in a 90-nm process co-developed with foundry partner Fujitsu Ltd.

With enhanced capabilities, the LatticeXP2 family doubles maximum logic capacity to 40k lookup tables (LUTs), adds dedicated DSP blocks and improves performance 25 percent, all while reducing the price per function by up to 50 percent.

Power consumption has been optimized on the 1.2-volt process technology, reducing static power usage by 33 percent, according to the company. The LatticeXP2 devices also include enhanced design security, RAM backup and live-update capabilities, Lattice said.

There are five members in the family, with capacities from 5k to 40k four-input LUTs. Embedded block memory provides up to 885 kbits in 18-kbit dual-port blocks. For small scratchpad memories, LUTs can also be converted into small, distributed memory blocks.

To support increasingly common DSP applications, up to 12 sysDSP blocks provide hardwired high-performance pipelined multiply-and-accumulate functions.

The devices also have up to four phase-locked loops that allow designers to align and synthesize clocks as required in their designs.

Meanwhile, I/O capacities for the family range from 86 to 540 pins, and flexible I/O buffers support the most popular I/O standards, including LVCMOS, SSTL, HSTL and low-voltage differential signaling.

That "thwack" sound you hear is Lattice sending the ping-pong ball hurtling back over the net.

Clive (Max) Maxfield is site editor of the Programmable Logic DesignLine (www.pldesignline.com).

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