PARIS " Portuguese analog and mixed signal circuit design provider Chipidea Microelectronica SA has developed a new generation of USB physical layer (PHY) architecture using 1.8V IO devices that aims to deliver low power consumption for SoC designers in the 65-nm and 45-nm technology nodes.

Chipidea said its 1.8V USB PHY architecture provides a power consumption of about 70mW. Compliant with the USB 2.0 specification, it is claimed to guarantee D+ and D- protection so as to withstand transient short-circuit voltage without damage.

The Lisbon-based company added that the core features analog programmability for fine tuning. The IP is available as a standalone PHY or matched with Chipidea's wide choice of USB controllers.

Celio Albuquerque, division director of Chipidea's Physical Solutions Division, stated: "This 1.8V platform extends our portfolio to a new IO Device choice, while maintaining the advantages of our IP, including analog programmability, built-in self-test (BIST), and full USB2.0 compliance."