The latest mobile phones already provide multiband and multimode operation on cellular networks. They use an increasing number of communication pipes for Wi-Fi connections, digital TV, digital audio broadcast and GPS satellite reception, among other technologies. Coming soon are ultrawideband (UWB) for wireless USB and WiMax for mobile Internet access.

Convergence among mobile devices means that many combinations of these RF communication/broadcast standards will also appear in PDAs, laptop computers and game consoles. In these consumer products, space, cost and power consumption constraints will make it no longer viable to have a dedicated wireless transceiver for each standard. Software-defined radio (SDR), implemented using an advanced programmable digital signal processor (DSP), such as an embedded-vector processor (EVP), holds the solution: a single module block capable of handling all these standards.

One reason dedicated wireless transceiver modules such as Bluetooth and Wi-Fi have attained market success is that these communications modules were mostly add-on options, not standard features. Therefore, solutions that allow manufacturers to configure an otherwise standard chassis simply by plugging in the appropriate modules, including the necessary RF and baseband processing, offer obvious benefits.

As combinations of these wireless communication channels become standard in equipment, however, the continued use of such dedicated modules becomes problematic. Not only will the aggregate size of the required modules become difficult to accommodate, but the total power consumption will threaten battery life, and the increased silicon area will adversely impact production cost. Moreover, in situations where several communications channels must be active at the same time, the modules' coexistence becomes a problem because of the number of mutually interfering antennas required (what NXP calls the "porcupine problem"; see "NXP executive tips extended vector processor for 4G," www.eetimes.eu, search article ID: 199203536).

Multiple communication channels
Reducing size, cost, power consumption and antenna interference suggests the use of an architecture in which all or part of the RF and baseband functionality is shared by different RF communication channels. For example, in an integrated solution, channels operating in the same frequency band, such as Bluetooth and IEEE 802.11b/g, could intelligently share RF hardware such as an antenna, a low-noise amplifier and a mixer. Likewise, channels that utilize similar modulation schemes could share a single programmable modem.

That will lead to new multiband, multimode architectures in which RF is integrated with RF and modem with modem, preferably with a standardized digital interface in between. To enable a single hardware modem to service several different wireless communications channels, highly flexible, software-program- mable modem engines are needed.

In practice, modem engines represent one of the best areas for manufacturers to differentiate themselves in the marketplace because of the opportunity they provide for enhancing wireless performance. The air interface for any mobile communications standard is rigidly defined, limiting manufacturers' ability to enhance RF front-end performance other than by choosing the best technology for implementing it (for example, using an RF CMOS, BiCMOS or GaAs process technology as appropriate). The codec at the other end of the modem pipe is also well defined in terms of the type of algorithm required for its implementation.

The all-important modem sitting between the RF front end and the codec, however, is an area in which proprietary IP can be used to process and condition the modulated/demodulated signal before it enters the codec, achieving a lower bit error rate (BER) or a reduction in transmit/receive power for a given BER.

Because this signal processing and conditioning must be adaptive to local conditions, such as multipath fading and interference, it should ideally be performed by DSP algorithms executed on a high-end software-programmable DSP. Such a programmable approach enables adaptation to changing standards and field test results. It also allows the addition of new, smarter algorithms (for example, to improve signal/noise ratio), something difficult to do afterward, in hardware-based solutions, without a silicon respin.

Because of the complexity of these algorithms, the processors used in modem pipe applications must be capable of superior performance, typically in excess of 10 giga-operations per second (Gops). However, the battery-powered, mobile nature of the devices for which they are designed also means that they must consume very little power (typically no more than a few hundred milliwatts). Using advanced low-power/low- leakage CMOS fabrication technology, this limits the processors' clock speeds to 300 MHz. To achieve the required Gops ratings at these clock speeds, the processors must exploit a very high level of parallelism (for example, by performing vector-wide processing).

Algorithms that can be vectorized to run on vector processors include those for signal conditioning functions such as equalization, interference cancellation and multipath correlation (rake receiver), and for signal processing functions such as synchronization, quadrature amplitude modulation (QAM) mapping/demapping and FFTs for OFDM demodulation.

There are, of course, other advantages to software programmability. It gives OEMs the ability to differentiate themselves in the marketplace using a single, freely available silicon platform, and it enables future shifts to newer, more advanced algorithms. DSP-based modems are also much more flexible when it comes to upgrading modem performance or adding features during the design-in process.

What are the alternatives to a programmable architecture? At present, two other approaches are being pursued: hardwired, dedicated building blocks and reprogrammable/reconfigurable hardware (such as FPGAs).

Hardwired building blocks are currently used in handsets having to implement only a relatively small number of (fixed) standards. While they are cost-effective in such limited applications, their required area increases rapidly with the number of standards. In fact, a recent NXP analysis of available solutions found that a solution capable of handling Edge, R'99, HSDPA and HSUPA standards in a single device using the dedicated-block approach required an area 50 percent to 120 percent larger than a programmable solution, such as NXP's EVP approach. The main reason is that standards have significant differences, and the engineering time required to implement effective resource sharing among standards in a hardware solution is simply too high for optimization to this level.